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Senior Waveform Architect in Defence Technology

Confidential company · Berlin · Posted Sep 4, 2026

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Public summary

A defense technology company is seeking a Senior Waveform Architect to lead the design and implementation of the physical layer for tactical anti-jam radio systems. The role involves developing waveform architecture, modulation, coding, and synchronization to ensure communications resilience in contested electronic warfare environments. Candidates will work hands-on with FPGA/SoC hardware and contribute to advanced secure communications for autonomous platforms in defense applications. Security clearance eligibility is required. The employer is committed to diversity and equal opportunity.

Location and work setup

Location
Berlin
Remote status
On-site
German requirement signal
No German Required Detected
Detected job language
English

Responsibilities

Lead design and implementation of physical layer waveform, including modulation, coding, framing, and synchronization from architecture through real-time execution. Engineer solutions for severe jamming scenarios and complex multi-node long-range communications. Own PHY specifications supporting direction finding components. Define development guidelines including HDL and verification practices and FPGA build flows.

Qualifications

Proven experience designing physical layer architectures brought to real-time execution on FPGA/SoC hardware. Strong quantitative knowledge in synchronization, estimation, forward error correction, and link budgeting. Practical skills in debugging radio links at the hardware level. Experience with anti-jamming and low probability of intercept/detection technologies in tactical environments is a plus. Background from recognized industry leaders and publicly available PHY implementations is advantageous. Eligibility to obtain required security clearance.

Skills

Waveform Architecture Physical Layer Design FPGA SoC Hardware Modulation Coding Synchronization Forward Error Correction Link Budgeting Electronic Warfare Anti-jamming Techniques Low Probability of Intercept/Detection (LPI/LPD) Hardware Debugging HDL FPGA Build Flows